Samsung releases details Exynos soc with Mongoose cores
Samsung has released details about its Exynos 8890 soc during the Hot Chips trade show. The soc has been used in the Galaxy S7 and S7 Edge since March, but the Korean company has not previously provided insight into the micro-architecture of the soc and the Mongoose cores in it.
The components in the 8890 soc were already announced when it was announced last November: the octacore soc has a big.Little design with four Cortex A53 cores and four more powerful cores, known as M1 or Mongoose cores. . Samsung has released details about those Mongoose cores in the presence of The Register on Hot Chips, discussing the micro-architecture of the v8 cores in detail. The M1 cores are designed entirely by Samsung itself, unlike previous core designs that are largely made by ARM. Samsung would have designed Mongoose cores based on the ARM v8 architecture in three years.
The M1 cores have an out-of-order design where one of the first blocks in the pipeline, the industry prediction, has a remarkable naming convention. That industry prediction should predict which instructions will follow the first in a series, so that they can already be prepared. Samsung has provided this industry prediction with a neural net in the Mongoose cores, so that the system can better learn from common instruction combinations. Incidentally, AMD and Intel also use similar techniques in their industry prediction, but this crucial part is being treated rather secretly.
After the branch prediction, instructions are stored in the 64KB instruction cache and sent to the instruction queue. The instructions are then translated to micro-ops by the decode block and sent to the core at four instructions per tick. The M1 supports full out-of-order instruction processing, which means that a new instruction can be worked on before a previous instruction is completely ready. In this way, the pipeline can remain optimally filled and no clock cycles are lost.
Each M1 core has an integer and a floating point unit and data from the two integer and fp units is stored in a 32KB large data cache. The subsequent L2 cache is 2MB in size and is shared by the four cores of the M1 module. Just like the big x86 brothers, there is a tlb present to quickly retrieve data from the memory. An L3 cache is not present: the next drive is the relatively slow memory.
The M1 cores were designed with Brad Burgess leading the development team. Burgess was previously responsible for AMD’s Bobcat design. That was AMD’s first energy-efficient design and shows many similarities with the Mongoose cores. However, the latter are even more economical with a maximum consumption of 3W per core, whereby only one core in the quad-core design is allowed to operate at the full speed of 2.6GHz at a time, so as not to exceed the energy budgets. The M1 module could be even faster, according to Burgess, but limited by the tdp. Broadly speaking, the Mongoose design is very similar to the Cortex A72 design, but the caches in particular are faster and larger in the M1 design.
According to ComputerBase, Samsung would be working on a refresh of the Exynos 8890, which will be numbered 8893, should solve some teething problems of the 8890 and would be slightly faster. In addition, the advanced M1 design, which is very reminiscent of desktop x86 designs, could also be deployed in a server chip, albeit with larger L2 caches and support for vector calculations.