Intel Announces Tremont Generation of Atom Architecture

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Intel has announced Tremont, a new core based on the company’s Atom architecture for power-efficient chips. Tremont will become part of Lakefield, among other things, where Intel combines Atom cores with more powerful computing cores.

Intel focuses with Tremont mainly on improving the performance per mW. The company has made improvements to the instruction set architecture, microarchitecture, security and power management. As a result, the amount of instructions per cycle, or IPC, has increased considerably compared to previous Atom generations, claims Intel.

Intel reports that Tremont’s single threaded performance gain in various benchmarks averages about 30 percent over Goldmont Plus, the predecessor in the Atom family. However, the company does not provide details and clock speeds are still unknown. Anyway, Intel makes the Tremont cores on a 10nm process, which should bring the necessary room for performance and consumption improvements compared to the Goldmont Plus produced on 14nm.

Tremont cores need to find their way to PCs, data centers, internet-of-things devices and network equipment, among other things. In addition, Intel points to the possibilities of using Foveros to combine Tremont with other architectures. This is happening at Lakefield, for example, where Intel combines four economical Atom cores with a powerful Sunny Cove core. Foveros is the name Intel gives to stacking chips and connecting them with vertical TSV channels, or through silicon vias.

One of the improvements concerns the out-of-order execution engine. Goldmont cores could decode three instructions out-of-order per cycle, but Tremont has two decoding engines that can do this, so Intel speaks of a 6-wide out-of-order decoder. As for the amount of L2 cache, Intel has given itself more flexibility. Instead of 1MB L2 cache per core, as with Goldmont, Tremont can be provided from 1.5MB to 4.5MB per module, whereby a module can consist of a maximum of four cores. The L2 cache is also shared by the cores.

Tremont also supports Intel Speed ​​Shift, the successor to Speed ​​Step, for fast and precise switching of power states by adjusting the clock speed. In terms of security, support for Intel Trusted Execution Technology, Boot Guard and Total Memory Encryption is available. Two 128-bit aes units and a single sha256 accelerator are also provided to offload the cores when using these encryption methods.

More details are in the presentation that Intel has published.

Intel Atom
Node Smartphone Tablet netbook/
Laptop
Network/
Server
saltwell 32nm 2011 Medfield
Clover Trail+
Clover Trail Cedar Trail
Silvermont 22nm 2013 Merrifield
Moorefield
Bay Trail-T Bay Trail-M
Bay Trail-D
rangeley
Avoton
Airmont 14nm 2015 ‘riverton’ Cherry Trail-T Braswell Denverton
Goldmont 14nm 2016 ‘Broxton’ Willow Trail
Apollo Lake
Apollo Lake
Goldmont+ 14nm 2017 Gemini Lake
Tremont 10+ 2019 Lakefield Lakefield Snow Ridge

Table sourced from AnandTech

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