Micron is working on 768Gbit TLC Nand chip
Micron is working on a 768Gbit nand memory chip with an area of 179.2mm2. The chip therefore has a higher storage density than Samsung’s current 256Gbit chip. Micron does not yet know whether the chip will actually come to market.
Micron’s 3d-nand chip offers maximum sequential read speeds of 800MB/s and write speeds of 44MB/s. With its surface area of 179.2mm² and storage capacity of 768Gbit, the chip has a storage density of 4.29Gbit/mm². It is a 3D chip in which the controller is placed under the flash chips. Micron announced during last week’s Solid-State Circuits Conference that it was working on the chip, but according to Eetimes it also said it has not yet decided whether the design will actually come to market.
Micron uses floating gate transistors at the tlc memory cells. This is the most commonly used type of transistor for planar flash-nand, but Samsung uses its proprietary charge-trap memory cells for its 3d-V-nand. Analysts claim to Eetimes that Samsung’s method is more expensive and complex than the traditional floating gate technique. With floating gate transistors, the electrons are stored in the conductive layer of the floating gate, with charge trap in the insulating layer around a channel, with Samsung applying the design vertically and using interconnect vias through the memory layers.
Micron’s chip would have a relatively large block size of 96MB and would not provide partial writing and erasing of memory blocks. This comes with drawbacks for efficient memory management, applying trim and, ultimately, for speed.
Memory manufacturers are in a race to increase data density and keep costs under control. It is Samsung’s strategy to increase the number of layers of its 3d-V-nand; the company is currently releasing 48-layer memory chips and claims to be able to stack 100 layers. Toshiba/Sandisk has 48-layer 256Gbit TLC ready and could be at 768Gbit by the end of 2017 with its BiCS technology. SK Hynix would start producing its 48-layer 256Gbit TLC in early 2016.
Update, 17:15: The article erroneously stated that the write speed of the Micron chip is 53MB/s, but it should be 44MB/s.
| Samsung V-nand 128Gbit-mlc 24 Layer | 133mm² | 0.96Gbit/mm² |
| Samsung V-nand 128Gbit TLC 32 Layer | 68.9mm² | 1.85Gbit/mm² |
| Samsung V-nand 256Gbit TLC 48 Layer | 97.6mm² | 2.6Gbit/mm² |
| Micron 2D-nand 128Gbit-mlc | 147mm² | 0.87Gbit/mm² |
| Micron 3D Nand 384Gbit TLC | 168.5mm² | 2.28Gbit/mm² |
| Micron 3D Nand 768Gbit TLC (Prototype) | 179.2mm² | 4.29Gbit/mm² |
| SK Hynix 3d-nand | 36 | 128Gbit (mlc) | Q4 2015 / 2016 |
| SK Hynix 3d-nand | 48 | 256Gbit (tlc) | Q1 2016 / ? |
| Samsung V-nand Gen 3 | 48 | 256Gbit (tlc) | August 2015 / ? |
| Samsung V-nand Gen 2 | 32 | 86/128Gbit (mlc) 128Gbit (tlc) |
May 2014 / H2 2014 |
| Samsung V-nand Gen 1 | 24 | 128Gbit (mlc) | August 2013 / H2 2013 |
| Toshiba/SanDisk BiCS | 48 | 128Gbit (mlc) | H2 2015 / 2016 |
| Toshiba/SanDisk BiCS | 48 | 256Gbit (tlc) | H1 2016 / 2016 |
| Intel/Micron 3d nand | 32 | 256Gbit (mlc) 384Gbits (tlc) |
Q4 2015 / 2016 |
| Latest figures from: October 2015, source:Computerbase | |||