ARM claims that processors with the new A72 cores offer comparable performance to Intel’s Core M 5Y10. The chip design company made this claim in announcing the details about the architecture of the Cortex A72 core for smartphone processors.
ARM published benchmark results comparing a processor with four Cortex A72 cores to an Intel Core M 5Y10 dual-core with support for HyperThreading. In the single-threaded tests GeekBench ST, SPECint and SPECfp, the A72 core must recognize its multiple in the Core M core, according to ARM, but the consumption would be significantly lower than the 4W of the Intel chip at less than 1W. When processing four threads at GeekBench MT and SPECintRate, the A72 quadcore would perform better. Also on the Stream benchmark, which is intended to measure the influence on memory bandwidth, the A72 would perform better on three of the four benchmarks. ARM tells Ars Technica that if the A72 and Core M are set up to perform equally, the Cortex core is three-quarters more efficient.
Whether the claims are true remains to be seen when the first processors with A72 cores appear. This should happen in 2016. Manufacturers often choose the benchmarks in which their product comes out best and it sometimes turns out that the clock speeds of chips on development boards are set unrealistically high.
The Cortex A72 was announced in February and ARM released new details on Thursday. The Cortex A72 will be the successor of the Cortex A57 core of the Snapdragon 810, among others. Qualcomm will use the new cores for some Snapdragon 600 models. For more powerful Snapdragons, the chip manufacturer comes with its own Kryo cores. With chips produced at 28nm, an A72 core would be 20 percent more efficient than an A57 core, but ARM assumes that production will take place at 14nm to 16nm from Samsung and TSMC respectively, according to AnandTech, so that the difference in the practice will be significantly greater.
ARM achieves this by building on the architecture of Cortex A57, but making improvements in key areas. For example, a more efficient branch prediction algorithm that relies less on speculation and makes fewer errors has been used. Also, tweaks have been made to the AArch64 implementation for 64bit processing, by merging statements at the handler, and improved simd and fp registries. When sending the instructions to the execution units, the A72 core can break commands into smaller parts, which improves the effective bandwidth. The executing units have also been modified to reduce latency and increase bandwidth for several instructions. Also, the fp pipeline has been shortened and finally the bandwidth to the LS and L2 cache has been increased, including through an advanced combined prefetcher.
ARM claims to have optimized every part of the A57 architecture and to be able to offer improvements in terms of surface area and performance as well as consumption.