Intel to scrap Cooper Lake server processors for two-socket systems
Intel has scrapped its Cooper Lake CPUs for two-socket servers. Cooper Lake server processors for four and eight socket servers will be released next quarter. The chips are reportedly only being delivered to a limited number of customers.
The deletion of Cooper Lake for two-socket systems was previously noted in an exclusive analysis by SemiAccurate. Intel then confirmed this discovery to tech site ServeTheHome. In fact, according to AnandTech, Intel should completely scrap the mass release of Cooper Lake: “The company is set to make the processors available only to priority customers who have already designed a platform with four or eight sockets for the hardware.”
The company says it made this decision because of “the continued success of the second-generation Xeon Scalable products.” According to the company, this is in conjunction with “the increasing demand for 10nm Ice Lake CPUs,” although such processors are not yet available. As a result, Intel said it would “constrict” Cooper Lake’s supply to “meet the market’s demand as best as possible.”
The original 2018 Intel Xeon roadmap
The company says delivery of Cooper Lake CPUs will start in the first half of 2020. So these are processors for servers with four or eight sockets. In addition, the processors are probably only supplied to a limited number of customers. Initially, these processors were planned for the end of 2019, ServeTheHome writes.
The Cooper Lake CPUs will be supported on the upcoming Cedar Island platform. This platform is scalable up to eight sockets. A leaked slide shows that Cedar Island will also receive support for six-channel memory, with up to 3TB of RAM per socket. Intel also says it will introduce its Ice Lake Xeon processors at 10nm for the Whitley platform. The company also remains on track for Ice Lake CPU deliveries later in 2020.
Cooper Lake CPUs are made on a 14nm process and contain up to 56 cores with hyperthreading. The Cooper Lake processors are also introducing new instruction sets, including bfloat16 for AI workloads.